This application is based on application No. 10-152812 filed in Japan, the entire content of which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to an apparatus which enlarges or reduces an image by electrically processing image data.
2. Description of the Related Art
As is known in the art, some image processing apparatuses designed to handle digital images are equipped with a function wherein image data is stored in a memory and the image data input in synchronism with a prescribed pixel clock is electrically scaled (the image size is enlarged or reduced). Regarding the electrical image scaling, U.S. Pat. No. 4,679,096, for example, proposes a technique which varies memory write clock and read clock in accordance with the scaling ratio. This technique, however, requires a memory capacity of two lines if write and read are to be performed simultaneously.
Japanese Patent Examined Publication No. 6-18435, on the other hand, proposes an address control method for reading out image data written to a memory. This method also requires a memory capacity of two lines if write and read are to be performed simultaneously.
U.S. Pat. No. 5,029,017 discloses an image processing apparatus capable of enlarging and reducing images. This apparatus is also capable of moving the enlarged or reduced image to a desired area by varying the read start address and write start address in an input buffer and an output buffer.
However, with the above-described electrical scaling methods, if memory write and memory read operations are to be performed simultaneously, a memory capacity of one line for memory writing and a memory capacity of one line for memory reading are separately needed. That is, the problem is that a memory capacity of two or more lines is required. It is, however, desirable to reduce the memory capacity from the viewpoint of reducing component cost, etc.
It is an object of the present invention to resolve the above problem.
It is another object of the invention to provide an apparatus or method which accomplishes image scaling with a memory of small capacity.
These and other objects are attained by an image processing apparatus having a memory for storing image data, writing means for inputting image data of a number of pixels, which is calculated by dividing a number of pixels included in one line by a magnification ratio, into the memory, and reading means for outputting the input image data in synchronism with a clock with respect to the magnification ratio, wherein a line output by the reading means is delayed for one line with respect to a line input by the writing means.